Principal Investigators: Yoshio Nishi, Krishna Saraswat, Philip Wong, Simon Wong, Yi Cui
Vision: This initiative for non-volatile memory research aims at dealing with challenges of increasing needs for embedded memory with high density and low cost with power minimization by forming an interdisciplinary team of faculty, staff and students to look into technical feasibility at the device level, circuit/system level as well as develop a fundamental understanding for a variety of new non-volatile memory phenomena, materials and processes.
Scope: NMTRI covers areas of research (i) how barrier engineering can improve flash memory (ii) how scalable are the various resistance switch materials and mechanisms (iii) how nanowire diodes can be integrated with resistive switches in crosspoint arrays (iv) how cell and circuit innovations can improve performance and (v) how bulk and interface effects control reliability and endurance. The scope of the initiative is for 5 years aiming at possible infusion into the 32-21nm ITRS nodes and beyond.
Participating core faculty members (in alphabetical order):
â€¢ Yi Cui (MSE), ferroelectric nanowires
â€¢ Yoshio Nishi (EE and MSE), metal sulphides and oxides based resistance change memory
â€¢ Krishna Saraswat (EE and MSE), floating gate flash memory with barrier engineering
â€¢ Philip Wong (EE), phase change based resistance change memory
â€¢ Simon Wong (EE), non-volatile memory cells and circuits
â€¢ COSAR, Korean Consortium
â€¢ Intel Corporation
â€¢ Micron Technology
â€¢ Samsung Electronics
â€¢ Texas Instruments
â€¢ Toshiba Corporation