personnel profile
Mark A. Horowitz |
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Research Statement
Horowitz is involved in research which includes multiprocessor design, graphics IO, and high-speed electrical and photonic links, and circuit issues in scaled technology. He is also starting up a research effort at applying EE analysis methods to biological systems.
| Degree | Discipline | Year | School |
|---|---|---|---|
| PhD | 1984 | Stanford |
| Publication Title | Author(s)/Speaker(s) | Open Document |
|---|---|---|
| The implementation of a 2-core, multi-threaded itanium family processor | Horowitz, MA, et. al. | |
| A 20-Gb/s 0.13- mu m CMOS serial link transmitter using an LC-PLL to directly drive the output multiplexer | Horowitz, MA, et. al. | |
| False coupling exploration in timing analysis | Horowitz, MA, et. al. | |
| Display All Publications | ||
Membership in National Academies
American Academy of Arts and Sciences, National Academy of Engineering
Academic Honors & Awards
2008 Elected into the American Academy of Arts & Sciences
2006 Donald O. Pederson Award
Most Influential Paper, International Symposium on Computer Architecture
2003 Jack Kilby Outstanding Paper Award, ISSCC
Elected Fellow, Association for Computing Machinery
2006 IEEE Solid State Circuits Technical Field Award
